E-560 XD-1 instructions later ca Clear and Add cad cs Clear and Subtract csu cm Clear and Add Magnitude cam ad Add add su Subtract sub dm Difference Magnitudes dim mu Multiply mul dv Divide dvd et Extract etr tad Twin and Add tad tsu Twin and Subtract tsu tmu Twin and Multiply tmu tdv Twin and Divide tdv st Store fst lst Left Store lst rst Right Store rst rao Add One aor sta Store Address sta ec Exchange ech csw Clear and Subtract Word Counter csw sr Shift Right dsr lsr Left (Element) Shift Right lsr rsr Right (Element) Shift Right rsr sl Shift Left dsl cl Cycle Left dcl slo Shift Left and Round typo? slr? slr asr Shift Accumulators Right asr asl Shift Accumulators Left asl acl Cycle Accumulators Left fcl bm Branch on Minus bfm blm Branch on Left Minus blm brm Branch on Right Minus brm bi Branch and Index bpx ria Reset Index Register xin rir Reset Index Register from Right Acc. xac aia Add Index Register adx se Select sel sea Select by Address sei Select by Identification rd Read rds wr Write wrt lac Load Address Counter ldc so Skip or Operate per? 3-112-0_Theory_Of_Programming_Apr59.pdf LS:R address (LS not FSQ-8) L1-3 index L4-6 class L7-10 variation L10-15 auxiliary 0.00000 - 1.77777 Memory 1 (64k) 2.00000 - 2.07777 Memory 2 (4k) 3.77760 - 3.77777 Test memory 22-00001_Central_Computer_System_Preliminary_Sep55.pdf *=indexable class variation 000 0000 hlt program stop 0001* etr extract 001- per operate 0100 csw clear & subtract word counter 0101 slr shift left & round 0110* ldb load B registers 001* 0000 cad clear & add 0001 add add 0010 tad twin & add 0011 adb add b registers 0110 csu clear & subtract 0111 sub subtract 1000 tsu twin & subtract 1101 cam clear & add magnitude 1101 dim difference magnitude 010* 1010 mul multiply 1011 tmu twin & multiply 1100 dvd divide 1101 tdv twin & divide 011* 0101 fst store 0110 lst left store 0111 rst right store 1000 sta store address 1001 aor add one right 1010 ech exchange 1100 dep deposit 100 0000 dsl shift left 0001 dsr shift right 0100 asl shift accumulators left 0101 asr shift accumulators right 1000 lsr left element shift right 1001 rsr right element shift right 1100 dcl cycle left 1110 fcl cycle accumulators left 101 001- bpx branch & index 010- bsn sense 1000 bfz branch on zero 1001 bfm branch on minus 1010 blm branch on left minus 1011 brm branch on right minus 110* 0000 ldc load IO address counter 001- sdr select drum 010- sel select 1110 rds read 1111 wrt write 111 1011 xin reset index register 1101 xac reset index register from right acc. 1110 adx add index register